Standards-compliant IP Design Advantages, Problems, and Future Directions

The number of IPs integrated in a chip is growing proportional to the number of gates available on the chip. Standards-compliant IP designs have been gaining momentum as a viable alternative to full custom in-house IP design. The notion is that it will be more efficient to port a third party IP designed based on industry standards than a non-standards-based IP. IP-based design is not a new concept but recent developments by standards organizations such as VSI, Spirit, OCP, FSA and others have brought us closer to a plug and play design capability-or have they? This comparative analysis paper (although some may consider it a position paper) takes a close look at standards in place and under development and tries to extrapolate the adaptation and deployment trends to answer the following questions: y Are all required protocols for a standards-based SoC design mature enough and supported by major EDA vendors? y When will we be able to approach SoC design as a PC motherboard design approach? y Are major EDA vendors motivated to support such a standards-based design approach? y What is missing? technical papers (www.amir.com/amir). Amir has worked on research and development of various aspects of VLSI from design to design automation, functional verification, functional coverage analysis, eDesign platforms, and assertion-based verification. His current projects include research and development of tools and techniques for standards-compliant IP-based ASIC Design and verification. In the past several years, he has served as a technical reviewer for Design Automation Conference (DAC), International Test Conference (ITC) and Parallel and Distributed Computing Systems (PDCS). He is a member of the Technical Program Committee of DesignCon East Conference and an associate editor of the International Journal of Computer and Their Applications (IJCA). Amir is IBM's representative on VSIA's IP Quality pillar and closely monitoring the development of other standard bodies such as VSIA IPP, OCP, FSA, and Spirit. Ken Goodnow received his Ph.D. from Penn State University in 1990. He received his MSEE from Penn State University, and his BSEE from the University of Arizona. He is a senior engineer at IBM Systems & Technology Group's IP Development. In the past 13 years at IBM, he has been involved with various design projects and design methodologies. For the last seven years he has been involved with IP development for ASIC design. Ken is a representative to VSIA for IBM and in that capacity helped to lead …